? semiconductor components industries, llc, 2005 october, 2005 ? rev. 9 1 publication order number: 1n5817/d 1n5817, 1N5818, 1n5819 1n5817 and 1n5819 are preferred devices axial lead rectifiers this series employs the schottky barrier principle in a large area metal?to?silicon power diode. state?of?the?art geometry features chrome barrier metal, epitaxial construction with oxide passivation and metal overlap contact. ideally suited for use as rectifiers in low?voltage, high?frequency inverters, free wheeling diodes, and polarity protection diodes. features ? extremely low v f ? low stored charge, majority carrier conduction ? low power loss/high efficiency ? lead temperature for soldering purposes: 260 c max for 10 seconds ? these are pb?free devices mechanical characteristics ? case: epoxy, molded ? weight: 0.4 gram (approximately) ? finish: all external surfaces corrosion resistant and terminal leads are readily solderable ? polarity: cathode indicated by polarity band ? esd ratings: machine model = c (>400 v) human body model = 3b (>8000 v) *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. axial lead case 59?10 do?41 plastic schottky barrier rectifiers 1.0 ampere 20, 30 and 40 volts preferred devices are recommended choices for future use and best overall value. marking diagram see detailed ordering and shipping information on page 2 o f this data sheet. ordering information http://onsemi.com a = assembly location 1n581x = device number x = 7, 8, or 9 yy = year ww = work week = pb?free package a 1n581x yyww (note: microdot may be in either location)
1n5817, 1N5818, 1n5819 http://onsemi.com 2 maximum ratings rating symbol 1n5817 1N5818 1n5819 unit peak repetitive reverse voltage working peak reverse voltage dc blocking voltage v rrm v rwm v r 20 30 40 v non?repetitive peak reverse voltage v rsm 24 36 48 v rms reverse voltage v r(rms) 14 21 28 v average rectified forward current (note 1), (v r(equiv) 0.2 v r (dc), t l = 90 c, r ja = 80 c/w, p.c. board mounting, see note 2, t a = 55 c) i o 1.0 a ambient temperature (rated v r (dc), p f(av) = 0, r ja = 80 c/w) t a 85 80 75 c non?repetitive peak surge current, (surge applied at rated load conditions, half?wave, single phase 60 hz, t l = 70 c) i fsm 25 (for one cycle) a operating and storage junction temperature range (reverse voltage applied) t j , t stg ?65 to +125 c peak operating junction temperature (forward current applied) t j(pk) 150 c maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual str ess limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation i s not implied, damage may occur and reliability may be affected. thermal characteristics (note 1) characteristic symbol max unit thermal resistance, junction?to?ambient r ja 80 c/w electrical characteristics (t l = 25 c unless otherwise noted) (note 1) characteristic symbol 1n5817 1N5818 1n5819 unit maximum instantaneous forward voltage (note 2) (i f = 0.1 a) (i f = 1.0 a) (i f = 3.0 a) v f 0.32 0.45 0.75 0.33 0.55 0.875 0.34 0.6 0.9 v maximum instantaneous reverse current @ rated dc voltage (note 2) (t l = 25 c) (t l = 100 c) i r 1.0 10 1.0 10 1.0 10 ma 1. lead temperature reference is cathode lead 1/32 in from case. 2. pulse test: pulse width = 300 s, duty cycle = 2.0%. ordering information device package shipping ? 1n5817 axial lead* 1000 units / bag 1n5817g axial lead* 1000 units / bag 1n5817rl axial lead* 5000 / tape & reel 1n5817rlg axial lead* 5000 / tape & reel 1N5818 axial lead* 1000 units / bag 1N5818g axial lead* 1000 units / bag 1N5818rl axial lead* 5000 / tape & reel 1N5818rlg axial lead* 5000 / tape & reel 1n5819 axial lead* 1000 units / bag 1n5819g axial lead* 1000 units / bag 1n5819rl axial lead* 5000 / tape & reel 1n5819rlg axial lead* 5000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *this package is inherently pb?free.
125 115 105 95 85 75 20 15 10 7.0 5.0 4.0 3.0 2.0 t r , reference temperature ( c) v r , dc reverse voltage (volts) figure 1. maximum reference temperature 1n5817 40 30 23 60 80 r ja ( c/w) = 110 125 115 105 95 85 75 20 15 10 7.0 5.0 30 4.0 3.0 40 30 23 r ja ( c/w) = 110 80 60 figure 2. maximum reference temperature 1N5818 125 115 105 95 85 75 20 15 10 7.0 5.0 30 4.0 40 r ja ( c/w) = 110 60 80 figure 3. maximum reference temperature 1n5819 40 30 23 t r , reference temperature ( c) v r , dc reverse voltage (volts) v r , dc reverse voltage (volts) t r , reference temperature ( c) 1n5817, 1N5818, 1n5819 http://onsemi.com 3 note 1. ? determining maximum ratings reverse power dissipation and the possibility of thermal runaway must be considered when operating this rectifier at reverse voltages above 0.1 v rwm . proper derating may be accomplished by use of equation (1). t a(max) = where t a(max) = t j(max) = p f(av) = p r(av) = r ja = t j(max) ? r ja p f(av) ? r ja p r(av) maximum allowable ambient temperature maximum allowable junction temperature (1) average forward power dissipation (125 c or the temperature at which thermal runaway occurs, whichever is lowest) average reverse power dissipation junction?to?ambient thermal resistance figures 1, 2, and 3 permit easier use of equation (1) by taking reverse power dissipation and thermal runaway into consideration. the figures solve for a reference temperature as determined by equation (2). t r = t j(max) ? r ja p r(av) (2) s ubstituting equation (2) into equation (1) yields: t a(max) = t r ? r ja p f(av) ( 3) inspection of equations (2) and (3) reveals that t r is the ambient temperature at which thermal runaway occurs or where t j = 125 c, when forward power is zero. the transition from one boundary condition to the other is evident on the curves of figures 1, 2, and 3 as a difference in the rate of change of the slope in the vicinity of 115 c. the data of figures 1, 2, and 3 is based upon dc conditions. for use in common rectifier circuits, table 1 indicates suggested factors for an equivalent dc voltage to use for conservative design, that is: (4) v r(equiv) = v in(pk) x f the factor f is derived by considering the properties of the various rectifier circuits and the reverse characteristics of schottky diodes. example: find t a(max) for 1N5818 operated in a 12?volt dc supply using a bridge circuit with capacitive filter such that i dc = 0.4 a (i f(av) = 0.5 a), i (fm) /i (av) = 10, input voltage = 10 v (rms) , r ja = 80 c/w. step 1. find v r(equiv) . read f = 0.65 from table 1, step 1. find v r(equiv) = (1.41)(10)(0.65) = 9.2 v. step 2. find t r from figure 2. read t r = 109 c step 1. find @ v r = 9.2 v and r ja = 80 c/w. step 3. find p f(av) from figure 4. **read p f(av) = 0.5 w @ i (fm) i (av) = 10 and if(av) = 0.5 a. step 4. find t a(max) from equation (3). step 4. find t a(max) = 109 ? (80) (0.5) = 69 c. * *values given are for the 1N5818. power is slightly lower for the 1 n5817 because of its lower forward voltage, and higher for the 1 n5819. circuit load half wave resistive capacitive* full wave, bridge resistive capacitive full wave, center tapped* ? resistive capacitive sine wave square wave 0.5 0.75 1.3 1.5 0.5 0.75 0.65 0.75 1.0 1.5 1.3 1.5 **note that v r(pk) 2.0 v in(pk) . ?use line to center tap voltage for v in . table 1. values for factor f
1n5817, 1N5818, 1n5819 http://onsemi.com 4 7/8 20 40 50 90 80 70 60 30 10 3/4 5/8 1/2 3/8 1/4 1.0 1/8 1 r jl , thermal resistance, junction?to?lead ( c/w) both leads to heatsink, equal length maximum typical l, lead length (inches) figure 4. steady?state thermal resistance 5.0 3.0 2.0 1.0 0.7 0.5 0.3 0.2 0.1 0.07 0.05 4.0 2.0 1.0 0.8 0.6 0.4 0.2 p f(av) , average power dissipation (watts) i f(av) , average forward current (amp) dc square wave t j 125 c 1.0 0.7 0.5 0.3 0.2 0.1 0.07 0.05 0.03 0.02 0.01 10k 2.0k 1.0k 500 200 100 50 20 10 5.0 2.0 1.0 0.5 0.2 0.1 5.0k r(t), transient thermal resistance (normalized) z jl(t) = z jl ? r(t) p pk p pk t p t 1 time duty cycle, d = t p /t 1 peak power, p pk , is peak of an equivalent square power pulse. t jl = p pk ? r jl [d + (1 ? d) ? r(t 1 + t p ) + r(t p ) ? r(t 1 )] where t jl = the increase in junction temperature above the lead temperature r(t) = normalized value of transient thermal resistance at time, t, from figure 6, i.e.: r(t) = r(t 1 + t p ) = normalized value of transient thermal resistance at time, t 1 + t p . t, time (ms) note 2. ? mounting data data shown for thermal resistance junction?to?ambient (r ja ) for the mountings shown is to be used as typical guide- line values for preliminary engineering, or in case the tie point temperature cannot be measured. typical values for r ja in still air mounting method 1/8 1/4 1/2 3/4 lead length, l (in) r ja 1 2 3 52 67 65 80 72 87 85 100 c/w c/w c/w 50 mounting method 1 p.c. board with 1?1/2 x 1?1/2 copper surface. mounting method 3 p.c. board with 1?1/2 x 1?1/2 copper surface. ll l = 3/8 board ground plane vector pin mounting ll mounting method 2 5 10 20 sine wave i (fm) i (av) = (resistive load) capacitive loads { figure 5. forward power dissipation 1n5817?19 figure 6. thermal response
1n5817, 1N5818, 1n5819 http://onsemi.com 5 100 70 5.0 30 20 10 7.0 5.0 3.0 20 7.0 10 3.0 2.0 30 1.0 40 15 5.0 3.0 2.0 0.3 0.2 0.1 40 36 12 30 20 1.0 0.5 0.05 0.03 24 16 20 8.0 4.0 28 032 10 20 7.0 5.0 2.0 0.2 0.3 0.5 0.7 1.0 3.0 0.9 1.0 1.1 0.1 0.07 0.05 0.03 0.02 0.6 0.5 0.4 0.3 0.2 0.7 0.1 0.8 note 3. ? thermal circuit model (for heat conduction through the leads) t a(a) t a(k) r s(a) r l(a) r j(a) r j(k) r l(k) r s(k) p d t l(a) t c(a) t j t c(k) t l(k) v f , instantaneous forward voltage (volts) i f , instantaneous forward current (amp) figure 7. typical forward voltage i fsm , peak surge current (amp) number of cycles figure 8. maximum non?repetitive surge current i r , reverse current (ma) v r , reverse voltage (volts) figure 9. typical reverse current t c = 100 c 25 c 1 cycle t l = 70 c f = 60 hz surge applied at rated load conditions 1n5817 1N5818 1n5819 t j = 125 c 100 c 25 c use of the above model permits junction to lead thermal re- sistance for any mounting configuration to be found. for a given total lead length, lowest values occur when one side of the rectifier is brought as close as possible to the heatsink. terms in the model signify: t a = ambient temperature t c = case temperature t l = lead temperature t j = junction temperature r s = thermal resistance, heatsink to ambient r l = thermal resistance, lead to heatsink r j = thermal resistance, junction to case p d = power dissipation (subscripts a and k refer to anode and cathode sides, re- spectively.) values for thermal resistance components are: r l = 100 c/w/in typically and 120 c/w/in maximum r j = 36 c/w typically and 46 c/w maximum. 75 c
1n5817, 1N5818, 1n5819 http://onsemi.com 6 note 4. ? high frequency operation since current flow in a schottky rectifier is the result of majority carrier conduction, it is not subject to junction diode forward and reverse recovery transients due to minor- ity carrier injection and stored charge. satisfactory circuit analysis work may be performed by using a model consist- ing of an ideal diode in parallel with a variable capacitance. (see figure 10.) rectification efficiency measurements show that opera- tion will be satisfactory up to several megahertz. for exam- ple, relative waveform rectification efficiency is approxi- mately 70 percent at 2.0 mhz, e.g., the ratio of dc power to rms power in the load is 0.28 at this frequency, whereas perfect rectification would yield 0.406 for sine wave inputs. however, in contrast to ordinary junction diodes, the loss in waveform efficiency is not indicative of power loss: it is simply a result of reverse current flow through the diode ca- pacitance, which lowers the dc output voltage. 10 20 0.8 70 200 100 50 30 20 10 6.0 4.0 2.0 1.0 0.6 8.0 0.4 40 c, capacitance (pf) v r , reverse voltage (volts) figure 10. typical capacitance t j = 25 c f = 1.0 mhz 1n5819 1N5818 1n5817
1n5817, 1N5818, 1n5819 http://onsemi.com 7 package dimensions b d k k f f a notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. all rules and notes associated with jedec do?41 outline shall apply 4. polarity denoted by cathode band. 5. lead diameter not controlled within f dimension. polarity indicator optional as needed (see styles) dim min max min max millimeters inches a 4.10 5.20 0.161 0.205 b 2.00 2.70 0.079 0.106 d 0.71 0.86 0.028 0.034 f ??? 1.27 ??? 0.050 k 25.40 ??? 1.000 ??? style 1: pin 1. cathode (polarity band) 2. anode axial lead case 59?10 issue u on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, r epresentation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 1n5817/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.
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